Special Value Specification for the VML

Special Value Specification for the VML

Function

Input Argument

Result

Current state

Default processor

Pentium® III processor

Pentium® 4 processor

Itanium® processor

float

double

float

double

float

double

float

double

Inv(x)

+ Inf (Raise DZ Exeption)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

1/2

Div(x,y)

0, 0

NaN (Raise DZ Exeption)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

0 / (+/-)Inf

(+/-)Inf / (+/-)Inf

NaN (Raise DZ Exeption)

(+/-)Inf / 0

(+/-)Inf

x / x for all non-special x

Sqrt(x)

+/- 0

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+ Inf

- Inf

NaN (Raise Invalid Exeption)

x<0

NaN (Raise Invalid Exeption)

InvSqrt(x)

+ Inf (Raise DZ Exeption)

NaN

x<0

NaN

+ Inf

- Inf

NaN

Cbrt(x)

+/- 0

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

InvCbrt(x)

+/- 0

+/- Inf (Raise DZ Exeption)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

+/- 0

Pow(x,y)

Any x (even NaN) and y=0

Any NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

|x|>1, y=Inf

Inf

|x|<1, y=Inf

|x|>1, y=-Inf

|x|<1, y=-Inf

Inf

x=Inf, y>0

Inf

x=Inf, y<0

x=-Inf, y odd pos. int

- Inf

x=-Inf, y not odd and pos. int

+ Inf

x=-Inf, y odd neg. int

x=-Inf, y not odd and neg. int

x=-1, y=(+/-)Inf

x=+1, y - any, even a NaN

x<0 and y finite non-int

NaN (Raise Invalid Exeption)

x=(+/-)0, y odd neg. int

(+/-)Inf (Raise DZ Exeption)

Exp(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

x> Precision`s Overflow Threshold

Inf (Raise Overflow Exeption)

Ln(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

-Inf (Raise DZ Exeption)

x<0

NaN

+ Inf

Inf

- Inf

NaN (Raise Invalid Exeption)

Log10(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

-Inf (Raise DZ Exeption)

x<0

NaN

+ Inf

- Inf

NaN (Raise Invalid Exeption)

Cos(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

NaN

Sin(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

NaN

SinCos(x)

Cos = 1, Sin = 0

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

NaN

Tan(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

NaN

Acos(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

NaN

|x|>1

NaN (Raise Invalid Exeption)

Machine PI/2

-1

Machine PI

Asin(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+/- Inf

NaN

|x|>1

NaN (Raise Invalid Exeption)

Machine PI/2

-1

Machine - PI/2

Atan(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+ Inf

PI/2

- Inf

- PI/2

Atan2

x=-Inf, y=-Inf

-3*PI/4

x=-Inf, y pos. finite

-PI/2

x=-Inf, y=0

-PI/2

x=-Inf, y=+Inf

-PI/4

x=-Inf, y pos. finite

-PI/2

x=-Inf, y=NaN

NaN

x neg. finite, y=-Inf

x neg. finite, y=0

PI/2

x neg. finite, y=+Inf

x neg. finite, y=NaN

NaN

Cosh(x)

NaN (Both QnaN and SNaN)

NaN

+ Inf

Inf

- Inf

Inf

x> Precision`s Overflow Threshold

+ Inf (Raise Owerflow Exeption)

x< Negative Overflow Threshold

+ Inf (Raise Owerflow Exeption)

Sinh(x)

NaN (Both QnaN and SNaN)

NaN

+ Inf

Inf

- Inf

x> Precision`s Overflow Threshold

+ Inf (Raise Owerflow Exeption)

x< Negative Overflow Threshold

- Inf (Raise Owerflow Exeption)

Tanh(x)

+/- Inf

+/- 1

NaN (Both QnaN and SNaN)

NaN

Acosh(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+ Inf

x<1

NaN

Asinh(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+ Inf

- Inf

Atanh(x)

NaN (Both QnaN and SNaN)

NaN (Raise Invalid Exeption for SnaN)

+ Inf

-1

- Inf

|x|>1

NaN

Remarks:
1) Blank cells - low accuracy version is equal to high accuracy version
2) "Default" means X87 code for all IA-32 processors

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